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| FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE Integrated Device Technology, Inc. IDT54/74FCT377T/AT/CT/DT FEATURES: * * * * Std., A, C and D speed grades Low input and output leakage 1A (max.) CMOS power levels True TTL input and output compatibility - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) High drive outputs (-15mA IOH, 48mA IOL) Power off disable outputs permit "live insertion" Meets or exceeds JEDEC standard 18 specifications Product available in Radiation Tolerant and Radiation Enhanced versions Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) Available in DIP, SOIC, QSOP, CERPACK and LCC packages DESCRIPTION: The IDT54/74FCT377T/AT/CT/DT are octal D flip-flops built using an advanced dual metal CMOS technology. The IDT54/ 74FCT377T/AT/CT/DT have eight edge-triggered, D-type flipflops with individual D inputs and O outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's O output. The CE input must be stable only one set-up time prior to the LOW-to-HIGH transition for predictable operation. * * * * * * FUNCTIONAL BLOCK DIAGRAM D0 CE D1 D2 D3 D4 D5 D6 D7 DQ CP CP O0 DQ CP DQ CP DQ CP DQ CP DQ CP DQ CP DQ CP O1 O2 O3 O4 O5 O6 O7 2630 drw 01 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES (c)1995 Integrated Device Technology, Inc. APRIL 1995 DSC-4200/3 6.14 1 IDT54/74FCT377T/AT/CT/DT FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES INDEX CE O0 D0 D1 O1 O2 D2 D3 O3 GND 1 2 3 4 5 6 7 8 9 10 20 19 P20-1 D20-1 SO20-2 SO20-8 & E20-1 18 17 16 15 14 13 12 11 O3 GND CP O4 D4 LCC TOP VIEW Vcc O7 D7 D6 O6 O5 D5 D4 O4 CP 2630 drw 02 D0 O0 CE Vcc O7 3 2 1 4 5 6 7 8 20 19 18 17 16 15 14 9 10 11 12 13 PIN CONFIGURATIONS D1 O1 O2 D2 D3 L20-2 D7 D6 O6 O5 D5 2630 drw 03 DIP/SOIC/QSOP/CERPACK TOP VIEW PIN DESCRIPTION Pin Names D0 - D7 Data Inputs Clock Enable (Active LOW) Data Outputs Clock Pulse Input 2630 tbl 01 FUNCTION TABLE(1) Description Operating Mode Load "1" Load "0" Hold CP H Inputs Outputs D h l X X O H L No Change No Change CE O0 - O7 CP CE l l h H ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Commercial VTERM(2) Terminal Voltage -0.5 to +7.0 with Respect to GND VTERM(3) Terminal Voltage -0.5 to with Respect to VCC +0.5 GND TA Operating 0 to +70 Temperature TBIAS Temperature -55 to +125 Under Bias TSTG Storage -55 to +125 Temperature PT Power Dissipation 0.5 IOUT DC Output Current -60 to +120 Military -0.5 to +7.0 Unit V NOTE: 2630 tbl 02 1. H = HIGH Voltage Level h = HIGH Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition L = LOW Voltage Level l = LOW Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition X = Don't Care = LOW-to-HIGH Clock Transition -0.5 to VCC +0.5 -55 to +125 -65 to +135 -65 to +150 0.5 -60 to +120 V CAPACITANCE (TA = +25C, f = 1.0MHz) C C C W mA Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. Unit 10 pF 12 pF 2630 lnk 04 NOTE: 1. This parameter is measured at characterization but not tested. 2630 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only. 6.14 2 IDT54/74FCT377T/AT/CT/DT FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10% Symbol VIH VIL IIH IIL II VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Current Input HIGH Current (4) Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max., VI = VCC (Max.) VCC = Min., IN = -18mA VCC = Max. , VO = GND VCC = Min. VIN = VIH or VIL IOH = -6mA MIL. IOH = -8mA COM'L. IOH = -12mA MIL. IOH = -15mA COM'L. (3) Min. 2.0 -- -- -- -- -- -60 2.4 2.0 -- -- -- -- Typ.(2) -- -- -- -- -- -0.7 -120 3.3 3.0 0.3 -- 200 0.01 Max. -- 0.8 1 1 1 -1.2 -225 -- -- 0.5 1 -- 1 Unit V V A A A V mA V V V A mV mA 2630 tbl 05 VI = 2.7V VI = 0.5V Input LOW Current(4) (4) Clamp Diode Voltage Short Circuit Current Output HIGH Voltage VOL IOFF VH ICC Output LOW Voltage Input/Output Power Off Leakage(5) Input Hysteresis Quiescent Power Supply Current VCC = Min. VIN = VIH or VIL VCC = 0V, VIN or VO 4.5V -- VCC = Max. VIN = GND or VCC IOL = 32mA MIL. IOL = 48mA COM'L. NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter is 5A at TA = -55C. 5. This parameter is guaranted but not tested. 6.14 3 IDT54/74FCT377T/AT/CT/DT FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) VCC = Max. VIN = 3.4V(3) VCC = Max., Outputs Open CE = GND One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10MHz One Bit Toggling fi = 5MHz 50% Duty Cycle VCC = Max., Outputs Open fCP = 10MHz, 50% Duty Cycle Eight Bits Toggling fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND Test Conditions(1) Min. -- -- Typ.(2) 0.5 0.15 Max. 2.0 0.25 Unit mA mA/ MHz IC Total Power Supply Current(6) VIN = VCC VIN = GND VIN = 3.4V VIN = GND -- -- 1.5 2.0 3.5 5.5 mA CE = GND VIN = VCC VIN = GND VIN = 3.4V VIN = GND -- -- 3.8 6.0 7.3(5) 16.3(5) CE = GND NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. 2639 tbl 05 6.14 4 IDT54/74FCT377T/AT/CT/DT FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE IDT54/74FCT377T Com'l. Symbol Parameter Condition(1) Min.(2) Max. Mil. Min.(2) Max. FCT54/74FCT377AT Com'l. Min.(2) Max. Mil. Min.(2) Max. Unit tPLH tPHL tSU tH tSU tH tW Propagation Delay CP to On Set-Up Time HIGH or LOW Dn to CP Hold Time HIGH or LOW Dn to CP Set-Up Time HIGH or LOW CE to CP Hold Time HIGH or LOW CE to CP Clock Pulse Width, HIGH or LOW CL = 50pF RL = 500 2.0 2.5 2.0 4.0 1.5 7.0 13.0 -- -- -- -- -- 2.0 3.0 2.5 4.0 1.5 7.0 15.0 -- -- -- -- -- 2.0 2.0 1.5 3.5 1.5 6.0 7.2 -- -- -- -- -- 2.0 2.0 1.5 3.5 1.5 7.0 8.3 -- -- -- -- -- ns ns ns ns ns ns 2630 tbl 06 IDT54/74FCT377CT Com'l. Symbol Parameter Condition(1) Min.(2) Max. Mil. Min.(2) Max. FCT54/74FCT377DT Com'l. Min.(2) Max. Mil. Min.(2) Max. Unit tPLH tPHL tSU tH tSU tH tW Propagation Delay CP to On Set-Up Time HIGH or LOW Dn to CP Hold Time HIGH or LOW Dn to CP Set-Up Time HIGH or LOW CE to CP Hold Time HIGH or LOW CE to CP Clock Pulse Width, HIGH or LOW CL = 50pF RL = 500 2.0 2.0 1.5 3.5 1.5 6.0 5.2 -- -- -- -- -- 2.0 2.0 1.5 3.5 1.5 7.0 5.5 -- -- -- -- -- 2.0 2.0 1.0 3.0 0.0 3.0 4.4 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- ns ns ns ns ns ns NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 2630 tbl 07 6.14 5 IDT54/74FCT377T/AT/CT/DT FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS V CC 500 VIN Pulse Generator RT D.U.T. 50pF CL 2630 drw 04 SWITCH POSITION Test 7.0V Switch Open Drain Disable Low Enable Low All Other Tests Closed Open VOUT 500 2630 lnk 08 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU tH 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 2630 drw 05 LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE 1.5V tREM 1.5V 2630 drw 06 tSU tH PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE DISABLE 3V 1.5V 0V 3.5V 0.3V tPHZ 0.3V 1.5V 0V VOH 0V 2630 drw 08 SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V 2630 drw 07 CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 3.5V 1.5V tPLZ VOL NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns 6.14 6 IDT54/74FCT377T/AT/CT/DT FAST CMOS OCTAL D FLIP-FLOP WITH CLOCK ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION IDT XX FCT X XXXX Device Type X Package X Process Temperature Range Family Blank B P D SO L E Q Commercial MIL-STD-883, Class B Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK Quarter-size Small Outline Package 377T Octal D Flip-Flop w/Clock Enable 377AT 377CT 377DT Blank 54 74 High Drive -55C to +125C 0C to +70C 2630 drw 09 6.14 7 |
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